Information

DDR Memory Controller
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
9-32 Freescale Semiconductor
9.4.1.21 Memory Data Path Read Capture High (CAPTURE_DATA_HI)
The memory data path read capture high register, shown in Figure 9-22, stores the high word of the read
data path during error capture.
Table 9-27 describes the CAPTURE_DATA_HI fields.
9.4.1.22 Memory Data Path Read Capture Low (CAPTURE_DATA_LO)
The memory data path read capture low register, shown in Figure 9-23, stores the low word of the read
data path during error capture.
Table 9-28 describes the CAPTURE_DATA_LO fields.
Offset 0xE20 Access: Read/Write
0 31
R
ECHD
W
Reset All zeros
Figure 9-22. Memory Data Path Read Capture High Register (CAPTURE_DATA_HI)
Table 9-27. CAPTURE_DATA_HI Field Descriptions
Bits Name Description
0–31 ECHD Error capture high data path. Captures the high word of the data path when errors are detected.
Offset 0xE24 Access: Read/Write
0 31
R
ECLD
W
Reset All zeros
Figure 9-23. Memory Data Path Read Capture Low Register (CAPTURE_DATA_LO)
Table 9-28. CAPTURE_DATA_LO Field Descriptions
Bits Name Description
0–31 ECLD Error capture low data path. Captures the low word of the data path when errors are detected.