Information

MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor xxxi
Figures
Figure
Number Title
Page
Number
14-110 PCI Express Inbound Mailbox Control Register (PEX_IMBCR) ...................................... 14-89
14-111 PCI Express Inbound Mailbox Data Register (PEX_IMBDR)........................................... 14-89
14-112 PCI Express Host Interrupt Enable Register (PEX_HIER) ................................................ 14-90
14-113 PCI Express Host Interrupt Status Register (PEX_HISR).................................................. 14-91
14-114 PCI Express Host Outbound PIO Interrupt Vector Register (PEX_HOPIVR)................... 14-92
14-115 PCI Express Host Inbound PIO Interrupt Vector Register (PEX_HIPIVR) ....................... 14-93
14-116 PCI Express Host Write DMA Interrupt Vector Register (PEX_HWDIVR)...................... 14-93
14-117 PCI Express Host Read DMA Interrupt Vector Register (PEX_HRDIVR) ....................... 14-93
14-118 PCI Express Host Miscellaneous Interrupt Vector Register (PEX_HMIVR)..................... 14-94
14-119 CSB System PIO Interrupt Enable Register (PEX_CSPIER)............................................. 14-95
14-120 CSB System Write DMA Interrupt Enable Register (PEX_CSWDIER) ........................... 14-96
14-121 CSB System Read DMA Interrupt Enable Register (PEX_CSRDIER) ............................. 14-96
14-122 CSB System Miscellaneous Interrupt Enable Register (PEX_CSMIER)........................... 14-97
14-123 CSB System PIO Interrupt Status Register (PEX_CSPISR) .............................................. 14-99
14-124 CSB System Write DMA Interrupt Status Register (PEX_CSWDISR)........................... 14-100
14-125 CSB System Read DMA Interrupt Status Register (PEX_CSRDISR)............................. 14-100
14-126 CSB System Miscellaneous Interrupt Status Register (PEX_CSMISR) .......................... 14-101
14-127 PCI Express PM Control Register (PEX_PM_CTRL) ..................................................... 14-103
14-128 PCI Express Outbound Window Attributes Register n (PEX_OWAR0–PEX_OWAR3). 14-104
14-129 PCI Express Outbound Window Base Address Register n (PEX_OWBAR0–PEX_OWBAR3)
14-105
14-130 PCI Express Outbound Window Translation Address Register Low n
(PEX_OWTARL0–PEX_OWTARL3)......................................................................... 14-106
14-131 PCI Express Outbound Window Translation Address Register High n
(PEX_OWTARH0–PEX_OWTARH3)........................................................................ 14-107
14-132 PCI Express EP Inbound Window Translation Address Register n
(PEX_EPIWTAR0–PEX_EPIWTAR3) ....................................................................... 14-108
14-133 PCI Express RC Inbound Window Attributes Register n (PEX_RCIWAR0–PEX_RCIWAR3) .
14-109
14-134 PCI Express RC Inbound Window Translation Address Register n
(PEX_RCIWTAR0–PEX_RCIWTAR3)...................................................................... 14-110
14-135 PCI Express RC Inbound Window Base Address Register Low n
(PEX_RCIWBARL0–PEX_RCIWBARL3)................................................................ 14-110
14-136 CI Express RC Inbound Window Base Address Register High n
(PEX_RCIWBARH0–PEX_RCIWBARH3)................................................................14-111
14-137 Requestor/Completer Relationship ....................................................................................14-111
14-138 PCI Express High-Level Layering.................................................................................... 14-112
14-139 PCI Express Packet Flow.................................................................................................. 14-112
14-140 Outbound Byte Swapping ................................................................................................. 14-115
14-141 Example—How to Generate WAKE#............................................................................... 14-127
14-142 DMA Descriptor Format................................................................................................... 14-129