Information

e300 Processor Core Overview
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 7-27
7.4.2.1 PowerPC Instruction Set and Addressing Modes
All PowerPC instructions are encoded as single-word (32-bit) opcodes. Instruction formats are consistent
among all instruction types, permitting efficient decoding to occur in parallel with operand accesses. This
fixed instruction length and consistent format simplifies instruction pipelining.
The PowerPC instructions are divided into the following categories:
• Integer instructions (includes computational and logical instructions)
— Integer arithmetic instructions
— Integer compare instructions
— Integer logical instructions
— Integer rotate and shift instructions
• Floating-point instructions (includes floating-point computational instructions and instructions
that affect the FPSCR)
— Floating-point arithmetic instructions
— Floating-point multiply/add instructions
— Floating-point rounding and conversion instructions
— Floating-point compare instructions
— Floating-point status and control instructions
• Load/store instructions (includes integer and floating-point load and store instructions)
— Integer load and store instructions
— Integer load and store multiple instructions
— Floating-point load and store
— Primitives used to construct atomic memory operations (lwarx and stwcx. instructions)
• Flow control instructions (includes branching instructions, condition register logical instructions,
trap instructions, and other instructions that affect the instruction flow)
— Branch and trap instructions
— Condition register logical instructions
• Processor control instructions (includes instructions used for synchronizing memory accesses and
managing caches, TLBs, and the segment registers)
— Move to/from SPR instructions
— Move to/from MSR
— Move to/from PMR
— Synchronize
— Instruction synchronize
• Memory control instructions (includes instructions that provide control of caches, TLBs, and
segment registers)
— Supervisor-level cache management instructions
— Translation lookaside buffer management instructions. Note that there are additional
implementation-specific instructions.