Information
e300 Processor Core Overview
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
7-26 Freescale Semiconductor
7.4.2 Instruction Set and Addressing Modes
The following sections describe the PowerPC instruction set and addressing modes in general.
11 ELRW Enable weighted LRU. This bit enables the use of an adjusted (weighted) LRU.
0 Normal operation.
1 The dcbt, dcbtst, and dcbz instructions use and adjusted (weighted) LRU such that they always
select and replace the lowest unlocked way in the data cache.
12 NOKS No kill for snoop. This bit enables the forcing of kill-type snoops to flush data instead of killing it.
0 Normal operation.
1 Forces write-with-kill snoops to flush instead of kill (snoop can never kill data).
13 HBE High BAT enable. Regardless of the setting of HID2[HBE], these BATs are accessible by mfspr and
mtspr.
0 IBAT[4–7] and DBAT[4–7] are disabled
1 IBAT[4–7] and DBAT[4–7] are enabled
14–15 — Reserved, should be cleared.
16–18 IWLCK[0–2] Instruction cache way-lock. Useful for locking blocks of instructions into the instruction cache for
time-critical applications that require deterministic behavior.
000 no ways locked
001 way 0 locked
010 way 0 through way 1 locked
011 way 0 through way 2 locked
100 way 0 through way 2 locked in e300c3.
101 way 0 through way 2 locked in e300c3.
110 way 0 through way 2 locked in e300c3.
111 way 0 through way 2 locked in e300c3.
Setting HID0[ILOCK] locks all ways.
19 ICWP Instruction cache way protection. Used to protect locked ways in the instruction cache from being
invalidated.
0 Instruction cache way protection disabled
1 Instruction cache way protection enabled
20–23 — Reserved, should be cleared.
24–26 DWLCK[0–2] Data cache way-lock. Useful for locking blocks of data into the data cache for time-critical applications
where deterministic behavior is required.
000 no ways locked
001 way 0 locked
010 way 0 through way 1 locked
011 way 0 through way 2 locked
100 way 0 through way 2 locked in e300c3.
101 way 0 through way 2 locked in e300c3.
110 way 0 through way 2 locked in e300c3.
111 way 0 through way 2 locked in e300c3.
Setting HID0[DLOCK] locks all ways.
27–31 — Reserved, should be cleared.
Table 7-6. e300HID2 Bit Descriptions (continued)
Bits Name Description