Information
Arbiter and Bus Monitor
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
6-6 Freescale Semiconductor
6.2.4 Arbiter Event Register (AER)
The arbiter uses arbiter event register (AER) to report on erroneous transactions. This register is cleared
by writing ones to the fields to be cleared. Figure 6-4 shows the fields of AER.
Table 6-5 describes AER fields.
27 RES Reserved transfer type.
Specifies, whether transaction with reserved transfer type will be reported in arbiter event registers.
0 Reserved transaction isn’t reported in arbiter event registers.
1 Reserved transaction is reported in arbiter event registers.
28 ECW External Control Word transfer type.
Specifies, whether transaction with external control word transfer type will be reported in arbiter
event registers.
0 External control word read/write transaction isn’t reported in arbiter event registers.
1 External control word read/write transaction is reported in arbiter event registers.
29 AO Address Only transfer type.
Specifies, whether transaction with address only transfer type will be reported in arbiter event
registers.
0 Address only transaction isn’t reported in arbiter event registers.
1 Address only transaction is reported in arbiter event registers.
30 DTO DTO - Data Time Out.
Specifies, whether data tenure time out will be reported in arbiter event registers.
0 Data time out isn’t reported in arbiter event registers.
1 Data time out is reported in arbiter event registers.
31 ATO ATO - Address Time Out.
Specifies, whether address tenure time out will be reported in arbiter event registers.
0 Address time out isn’t reported in arbiter event registers.
1 Address time out is reported in arbiter event registers.
Offset 0x0C Access: User w1c
0 25 26 27 28 29 30 31
R
—
ETEA RES ECW AO DTO ATO
W w1c w1c w1c w1c w1c w1c
Reset All zeros
Figure 6-4. Arbiter Event Register (AER)
Table 6-5. AER Field Descriptions
Bits Name Description
0–25 — Write reserved, read = 0
26 ETEA Transfer error. Reports on detection of transfer error by one of the slaves.
0 No transfer error detected by one of the slaves.
1 Transfer error detected by one of the slaves.
Table 6-4. AEER Bit Settings
Bits Name Description