Information

System Configuration
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 5-69
5.6.7 Initialization/Application Information (Programming Guidelines for
GTM Registers)
The following initialization sequence of GTM is recommended:
• Write to GTCFRn in order to reset, to stop, or to configure the appropriate timer’s operation:
cascaded timers configuration, gate mode configuration.
•Write to GTPSRn[PPS] fields in order to program the appropriate timer’s clock primary prescaler.
• Write to GTMDRn in order to choose an input clock, to program the secondary prescaler, and to
set a desirable appropriate timer’s operational mode.
NOTE
Erratic behavior may occur if GTCFRn and GTPSR are not initialized before
the GTMDR. Only GTCFRn[RSTn] can be modified at any time
• Clear GTEVRn[REF] and GTEVRn[CAP] by writing 1s in order to clear the previous events.
• Write to GTRFR and to GTCNRn according to appropriate timer’s GTMDRn programming.
NOTE
A write cycle to a GTCNRn[CNV] fields sets the register to the written
value, causing its corresponding primary and secondary prescalers,
(GTPSRn[PPS] and GTMDRn[SPS]), to be reset.
• Write to GTCFRn[STPn] and to GTCFRn[RSTn] in order to initialize the appropriate timer’s
operation.
• Write to GTCFRn register in order to start the corresponding timer (GTCFRn[STPn] = 0).
5.7 Power Management Control (PMC)
The device provides a power management control (PMC) unit, which enables the device to smoothly enter
and exit low-power modes. Low-power modes may be used when internal units in the device temporarily
or permanently do not perform any action.
The device uses one or more of the following methods for power saving:
• DDR2 power management
• Shutting down clocks to unused blocks
• Software-controlled power-down states for the e300 core