Information

System Configuration
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
5-48 Freescale Semiconductor
Figure 5-35 shows the functional PIT block diagram.
Figure 5-35. Periodic Interval Timer High Level Block Diagram
5.5.2 PIT Features
The key features of the PIT include the following:
• Maintains a 32-bit down-counter, clocked by a 32-bit prescaled input clock
• 32-bit PIT counter can be initialized by software to specific initial count value
• Provides programmable and maskable periodic interrupt
• Uses two possible clock sources: the CSB clock or an external RTC_PIT_CLOCK.
• PIT function can be disabled
5.5.3 PIT Modes of Operation
The PIT unit can operate in the following modes:
• PIT enable/disable mode
• PIT periodic interrupt enable/disable mode
• PIT internal/external input clock mode
5.5.4 PIT External Signal Description
This section provides an overview and detailed descriptions of the PIT signals. There is one distinct
external input signal (PIT clock), defined in Table 5-45.
Table 5-46 describes of the external PIT signal.
Table 5-45. PIT Signal Properties
Name Function I/O Reset Pull Up
RTC_PIT_CLOCK Periodic interval timer. I N/A —
Table 5-46. PIT External Signal—Detailed Signal Descriptions
Signal I/O Description
RTC_PIT_
CLOCK
I This signal is used as the timebase for the periodic interval timer module.
Periodic
Periodic
Interrupt
PIT
Interval
Register Interface
Clock
System
Clock
Timer