Information

System Configuration
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 5-45
5.4.6.6 Real Time Counter Alarm Register (RTALR)
The real time counter alarm register (RTALR), shown in Figure 5-33, contains the 32-bit alarm (ALRM)
value. When the value of the RTC counter equals the RTALR[ALRM] value, a maskable interrupt is
generated.
Table 5-44 lists the bit field of RTALR.
5.4.7 Functional Description
This section provides a functional description of the real time counter unit (RTC), including a block
diagram.
5.4.7.1 Real Time Counter Unit
The RTC timer is suitable for time stamping or time and calendar generation. It can maintain a one-second
count, which is unique over a period of approximately 136 years. Software can convert this count into
time-of-day or calendar information, as required. An alarm function is also provided. The RTC can be
clocked by the internal system bus clock or by an external clock source. The RTC consists of 32-bit
up-counter, which is incremented by a one-second count clock derived from the RTC input clock. The RTC
can be programmed to generate a maskable interrupt when the time value matches the value in its
associated alarm register.
The RTC can be initialized by software with an initial count value in the real time counter load register
(RTLDR). It can also be programmed to generate an interrupt every second. The real time counter control
register (RTCTR) is used to enable or disable various timer functions. The real time counter event register
(RTEVR) is used to report the interrupt source. The RTC counter is reset to zero on asserting
RTCCR[RESET_RTC]. It is not affected by hard reset or PORESET. The RTC registers are initialized by
the software. The RTC function can be disabled by programming the RTC registers.
Figure 5-34 shows the functional RTC block diagram.
Offset 0x14 Access: Read/Write
0 31
R
ALRM
W
Reset11111111111111111111111111111111
Figure 5-33. Real Time Counter Alarm Register (RTALR)
Table 5-44. RTALR Bit Settings
Bits Name Description
0–31 ALRM RTC alarm value.
The alarm interrupt is generated when the value of the RTC counter equals RTALR[ALRM].