Information

System Configuration
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
5-44 Freescale Semiconductor
5.4.6.4 Real Time Counter Register (RTCTR)
The real time counter register (RTCTR), shown in Figure 5-31, is a read-only register that shows the
current value in the RTC counter.
The CNTV value is not affected by reads or writes to RTCTR.
Table 5-42 lists the bit field of RTCTR.
5.4.6.5 Real Time Counter Event Register (RTEVR)
The real time counter event register (RTEVR), shown in Figure 5-32, is used to report the source of the
interrupts. The register can be read at any time.
RTEVR bits are cleared by writing ones. Writing zeros does not affect the value of the status bits.
Table 5-43 lists the bit fields of RTEVR.
Offset 0x0C Access: Read only
0 31
R CNTV
W
Reset All zeros
Figure 5-31. Real Time Counter Register (RTCTR)
Table 5-42. RTCTR Bit Settings
Bits Name Description
0–31 CNTV RTC counter value field. RTCTR[CNTV] contains the current value of the time counter. This is a read-only
field. Writes have no effect on RTCTR[CNTV].
Offset 0x10 Access: w1c
0 29 30 31
R
—
AIF SIF
W w1c w1c
Reset All zeros
Figure 5-32. Real Time Counter Event Register (RTEVR)
Table 5-43. RTEVR Bit Settings
Bits Name Description
0–29 — Write reserved, read = 0
30 AIF Alarm interrupt flag bit.
Used to indicate the alarm interrupt. It is set if the RTC counter equals RTALR minus one. This bit can be
cleared by writing 1.
31 SIF Second interrupt flag bit.
Used to indicate the every-second interrupt. This status bit is set each time that the prescaler count reaches
zero. This bit can be cleared by writing 1.