Information

MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
xvi Freescale Semiconductor
Figures
Figure
Number Title
Page
Number
Chapter 18
DUART
18.1 Overview........................................................................................................................ 18-1
18.1.1 Features...................................................................................................................... 18-2
18.1.2 Modes of Operation ................................................................................................... 18-2
18.2 External Signal Descriptions ......................................................................................... 18-3
18.2.1 Signal Overview ........................................................................................................ 18-3
18.2.2 Detailed Signal Descriptions ..................................................................................... 18-3
18.3 Memory Map/Register Definition ................................................................................. 18-3
18.3.1 Register Descriptions................................................................................................. 18-5
18.4 Functional Description................................................................................................. 18-16
18.4.1 Serial Interface......................................................................................................... 18-17
18.4.2 Baud-Rate Generator Logic..................................................................................... 18-18
18.4.3 Local Loopback Mode............................................................................................. 18-19
18.4.4 Errors ....................................................................................................................... 18-19
18.4.5 FIFO Mode .............................................................................................................. 18-19
18.5 DUART Initialization/Application Information .......................................................... 18-21
Chapter 19
Serial Peripheral Interface
19.1 Overview........................................................................................................................ 19-1
19.1.1 Features...................................................................................................................... 19-2
19.1.2 SPI Transmission and Reception Process.................................................................. 19-2
19.1.3 Modes of Operation ................................................................................................... 19-3
19.2 External Signal Descriptions ......................................................................................... 19-6
19.2.1 Overview.................................................................................................................... 19-6
19.2.2 Detailed Signal Descriptions ..................................................................................... 19-6
19.3 Memory Map/Register Definition ................................................................................. 19-7
19.3.1 Register Descriptions................................................................................................. 19-8
19.4 Initialization/Application Information......................................................................... 19-15
19.4.1 SPI Master Programming Example ......................................................................... 19-15
19.4.2 SPI Slave Programming Example............................................................................ 19-15
Chapter 20
JTAG/Testing Support
20.1 Overview........................................................................................................................ 20-1
20.2 JTAG Signals ................................................................................................................. 20-1
20.2.1 External Signal Descriptions ..................................................................................... 20-2