Information

System Configuration
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 5-17
5.2.2.3 System Part and Revision ID Register (SPRIDR)
The SPRIDR, shown in Figure 5-12, provides information about the device and revision numbers.
Table 5-21 defines the bit fields of SPRIDR.
5.2.2.3.1 SPRIDR[PARTID] Coding
Table 5-22 defines the reset values of SPRIDR[PARTID].
5.2.2.3.2 SPRIDR[REVID] Coding
Table 5-23 defines the reset values of SPRIDR[REVID].
5.2.2.4 System Priority and Configuration Register (SPCR)
The system priority and configuration register (SPCR), shown in Figure 5-13, controls the priority of
requests for transactions on the internal system bus. This priority is considered by the system arbiter
Offset 0x00108 Access: Read only
0 23 24 31
R
PARTID REVID
W
Reset See Tabl e 5- 22 and Table 5-23 for reset values of this register.
Figure 5-12. System Part and Revision ID Register (SPRIDR)
Table 5-21. SPRIDR Bit Settings
Bits Name Description
0–23 PARTID Part identification.
This read-only field is mask-programmed with a code corresponding to the device number. It is intended to
help factory test and user code that is sensitive to device changes. The device number changes according
to manufacturing considerations. See Ta bl e 5- 22 for values of this field.
24–31 REVID Revision identification.
This read-only field is mask-programmed with a code corresponding to the revision number of the part
defined in PARTID field. It is intended to help factory test and user code that is sensitive to device changes.
The mask number is programmed in a commonly changed layer, and changes with each mask set change.
See Tabl e 5-2 3 for values of this field.
Table 5-22. PARTID Coding
PARTID Device Name Package Type
0x810101 MPC8308 MAPBGA
Table 5-23. REVID Coding
REVID Device Revision
0x10 1.0
0x11 1.1