Information

System Configuration
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 5-7
5.1.4.2 Alternate Configuration Base Address Register (ALTCBAR)
The alternate configuration base address register (ALTCBAR) is used to define the base address for an
alternate 1-Mbyte region of configuration space to be used by the boot sequencer. By loading the proper
boot sequencer command in the serial ROM, the base address in the ALTCBAR can be combined with the
20 bits of address offset supplied from the serial ROM to generate a 32-bit address. Thus, by configuring
this register, the boot sequencer has access to the entire memory map, one 1-Mbyte block at a time. See
Section 17.4.5, “Boot Sequencer Mode,” for more information.
NOTE
ALTCBAR is not considered a local access window on its own, so the boot
sequencer must configure one of the other eight local access windows
properly to reach the desired target peripherals.
The alternate configuration base address register is shown in Figure 5-3.
Table 5-6 defines the bit fields of ALTCBAR.
‘
5.1.4.3 LBC Local Access Window n Base Address Registers
(LBLAWBAR0–LBLAWBAR3)
The LBC local access window n base address registers (LBLAWBAR0–LBLAWBAR3) are shown in
Figure 5-4.
Offset 0x08 Access: Read/Write
01112 31
R
BASE_ADDR —
W
Reset All zeros
Figure 5-3. Alternate Configuration Base Address Register (ALTCBAR)
Table 5-6. ALTCBAR Bit Settings
Bits Name Description
0–11 BASE_ADDR Identifies the12 most-significant address bits of an alternate base address used for boot sequencer
configuration accesses.
12–31 — Reserved. Write has no effect, read returns 0.
Offset 0x20, 0x28, 0x30, 0x38 Access: Read/Write
0 19 20 31
R
BASE_ADDR
1
1
The LBLAWBAR0[BASE_ADDR] reset value depends on the reset configuration word high values. See Section 5.1.4.3.1,
“LBLAWBAR0[BASE_ADDR] Reset Value,” for a detailed description.
—
W
Reset All zeros
Figure 5-4. LBC Local Access Window n Base Address Registers (LBLAWBAR0–LBLAWBAR3)