Information

MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 5-1
Chapter 5
System Configuration
This chapter describes several functions that control the local access windows, system configuration,
protection, and general utilities. These functions are discussed in the following sections:
• Section 5.1, “Local Memory Map Overview and Example”
• Section 5.2, “System Configuration”
• Section 5.3, “Software Watchdog Timer (WDT)”
• Section 5.4, “Real Time Clock (RTC) Module”
• Section 5.5, “Periodic Interval Timer (PIT)”
• Section 5.6, “General-Purpose Timers (GTMs)”
• Section 5.7, “Power Management Control (PMC)”
5.1 Local Memory Map Overview and Example
The device provides a flexible local memory map. The local memory map refers to the 32-bit address space
seen by the processor as it accesses memory and I/O space. Internal DMA engines also see this same local
memory map. All memory accessed by the DDR SDRAM and local bus memory controllers exists in this
memory map, as do all memory-mapped configuration, control, and status registers.
The local memory map is defined by a set of eight local access windows. Each of these windows maps a
region of memory to a particular target interface, such as the DDR SDRAM controller. Note that the local
access windows do not perform any address translation. The size of each window can be configured from
4 Kbytes to 2 Gbytes. Each local access window is assigned to a specific target interface as specified in
Table 5-1.
Table 5-1. Local Access Windows Target Interface
Window Number Target Interface Comments
0 Configuration registers (IMMR) Fixed 1-Mbyte window size
1 Local bus —
2 Local bus —
3 Local bus —
4 Local bus —
5 DDR2 SDRAM —
6 DDR2 SDRAM —
7 PCI Express —