Information

MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor xiii
Figures
Figure
Number Title
Page
Number
13.9.3 Non-Zero Fields the Register File ......................................................................... 13-154
13.9.4 SOF Interrupt......................................................................................................... 13-154
13.9.5 Embedded Design.................................................................................................. 13-154
13.9.6 Miscellaneous Variations from EHCI.................................................................... 13-154
13.10 Timing Diagrams ....................................................................................................... 13-156
Chapter 14
PCI Express Interface Controller
14.1 Introduction.................................................................................................................... 14-1
14.1.1 MPC8308 as a PCI Express Initiator......................................................................... 14-3
14.1.2 MPC8308 as a PCI Express Target............................................................................ 14-3
14.1.3 Features...................................................................................................................... 14-4
14.1.4 Modes of Operation ................................................................................................... 14-4
14.2 External Signal Descriptions ......................................................................................... 14-5
14.3 Memory Map/Register Definitions................................................................................ 14-5
14.3.1 PCI Express Memory Map ........................................................................................ 14-5
14.4 PCI Express Core Configuration Header Registers..................................................... 14-14
14.4.1 Common PCI Express-Compatible Configuration Header Registers...................... 14-14
14.4.2 Type 0 PCI Express-Compatible Configuration Header Registers.......................... 14-21
14.4.3 Type 1 PCI-Compatible Configuration Header Registers ....................................... 14-27
14.4.4 PCI Express-Compatible Device-Specific Configuration Space Registers............. 14-36
14.4.5 PCI Express Extended Configuration Space ........................................................... 14-52
14.4.6 PCI Express Controller Internal Control and Status Registers (CSRs) ................... 14-62
14.4.7 PCI Express BAR Configuration Registers (EP Mode) .......................................... 14-72
14.4.8 PCI Express Extended Status and Control Registers............................................... 14-74
14.5 PCI Express CSB Bridge............................................................................................. 14-76
14.5.1 PCI Express CSB Bridge Configuration Space....................................................... 14-77
14.5.2 Global Registers....................................................................................................... 14-77
14.5.3 PCI Express Outbound PIO Registers ..................................................................... 14-80
14.5.4 PCI Express Inbound PIO Registers........................................................................ 14-82
14.5.5 DMA Registers ........................................................................................................ 14-83
14.5.6 Mailbox Registers.................................................................................................... 14-88
14.5.7 PCI Express Host Interrupt Registers...................................................................... 14-90
14.5.8 CSB System Interrupt Registers .............................................................................. 14-94
14.5.9 PCI Express Power Management Registers........................................................... 14-103
14.5.10 PCI Express Outbound Address Mapping Registers............................................. 14-104
14.5.11 PCI Express EP Inbound Address Translation Registers ...................................... 14-107
14.5.12 PCI Express RC Inbound Address Mapping Registers ......................................... 14-108
14.6 Functional Description................................................................................................14-111
14.6.1 Architecture ........................................................................................................... 14-112