Information

Complete List of Configuration, Control, and Status Registers
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
A-24 Freescale Semiconductor
0x338 RQFCR*—Receive queue filing table control register R/W 0xnnnn_nnnn 16.5.3.3.7/16-54
0x33C RQFPR*—Receive queue filing table property register R/W 0xnnnn_nnnn 16.5.3.3.8/16-55
0x340 MRBLR—Maximum receive buffer length register R/W 0x0000_0000 16.5.3.3.9/16-59
0x344–
0x380
Reserved — — —
0x384 RBPTR0—RxBD pointer for ring 0 R/W 0x0000_0000 16.5.3.3.10/16-60
0x388 Reserved — — —
0x38C RBPTR1*—RxBD pointer for ring 1 R/W 0x0000_0000 16.5.3.3.10/16-60
0x390 Reserved — — —
0x394 RBPTR2*—RxBD pointer for ring 2 R/W 0x0000_0000 16.5.3.3.10/16-60
0x398 Reserved — — —
0x39C RBPTR3*—RxBD pointer for ring 3 R/W 0x0000_0000 16.5.3.3.10/16-60
0x3A0 Reserved — — —
0x3A4 RBPTR4*—RxBD pointer for ring 4 R/W 0x0000_0000 16.5.3.3.10/16-60
0x3A8 Reserved — — —
0x3AC RBPTR5*—RxBD pointer for ring 5 R/W 0x0000_0000 16.5.3.3.10/16-60
0x3B0 Reserved — — —
0x3B4 RBPTR6*—RxBD pointer for ring 6 R/W 0x0000_0000 16.5.3.3.10/16-60
0x3B8 Reserved — — —
0x3BC RBPTR7*—RxBD pointer for ring 7 R/W 0x0000_0000 16.5.3.3.10/16-60
0x3C0–
0x400
Reserved — — —
0x404 RBASE0—RxBD base address of ring 0 R/W 0x0000_0000 16.5.3.3.11/16-60
0x408 Reserved — — —
0x40C RBASE1*—RxBD base address of ring 1 R/W 0x0000_0000 16.5.3.3.11/16-60
0x410 Reserved — — —
0x414 RBASE2*—RxBD base address of ring 2 R/W 0x0000_0000 16.5.3.3.11/16-60
0x418 Reserved — — —
0x41C RBASE3*—RxBD base address of ring 3 R/W 0x0000_0000 16.5.3.3.11/16-60
0x420 Reserved — — —
0x424 RBASE4*—RxBD base address of ring 4 R/W 0x0000_0000 16.5.3.3.11/16-60
0x428 Reserved — — —
0x42C RBASE5*—RxBD base address of ring 5 R/W 0x0000_0000 16.5.3.3.11/16-60
Table A-21. Enhanced Three-Speed Ethernet Controllers (eTSECs) Registers (continued)
eTSEC 1—Block Base Address 0x2_4000
eTSEC 2—Block Base Address 0x2_5000
eTSEC1
Offset
Name
1
Access
2
Reset Section/Page