Information

Complete List of Configuration, Control, and Status Registers
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
A-18 Freescale Semiconductor
0x8E0 PCI Express Inbound PIO Control Register
(PEX_CSB_IBCTRL)
R/W 0x0000_0000 14.5.4.1/14-82
0x8E4 PCI Express Inbound PIO Status Register (PEX_CSB_IBSTAT) w1c 0x0000_0000 14.5.4.2/14-83
0x8E8 Reserved — — —
PCI Express DMA Registers
0x990 Reserved — — —
0x9A0 PCI Express Write DMA Control Register (PEX_WDMA_CTRL) R/W 0x0000_0000 14.5.5.1/14-84
0x9A4 PCI Express Write DMA first Address Register
(PEX_WDMA_ADDR)
R/W 0x0000_0000 14.5.5.2/14-84
0x9A8 PCI Express Write DMA Status Register (PEX_WDMA_STAT) w1c 0x0000_0000 14.5.5.3/14-85
0x9AC Reserved — — —
0xA40 PCI Express Read DMA Control Register (PEX_RDMA_CTRL) R/W 0x0000_0000 14.5.5.4/14-86
0xA44 PCI Express Read DMA first Address Register
(PEX_RDMA_ADDR)
R/W 0x0000_0000 14.5.5.5/14-86
0xA48 PCI Express Read DMA Status Register (PEX_RDMA_STAT) w1c 0x0000_0000 14.5.5.6/14-87
Mailbox Registers
0xB20 PCI Express Outbound Mailbox Control Register
(PEX_OMBCR)
R/W 0x0000_0000 14.5.6.1/14-88
0xB24 PCI Express Outbound Mailbox Data Register (PEX_OMBDR) R/W 0x0000_0000 14.5.6.2/14-88
0xB60 PCI Express Inbound Mailbox Control Register (PEX_IMBCR) R/W 0x0000_0000 14.5.6.3/14-89
0xB64 PCI Express Inbound Mailbox Data Register (PEX_IMBDR) R/W 0x0000_0000 14.5.6.4/14-89
PCI Express Host Interrupts Registers
0xBA0 PCI Express Host Interrupt Enable Register (PEX_HIER) R/W 0x0000_0000 14.5.7.1/14-90
0xBA4 PCI Express Host Interrupt Status Register (PEX_HISR) w1c 0x0000_0000 14.5.7.2/14-91
0xBA8 PCI Express Host Outbound PIO Interrupt Vector Register
(PEX_HOPIVR)
R/W 0x0000_0000 14.5.7.3/14-92
0xBC0 PCI Express Host Inbound PIO Interrupt Vector Register
(PEX_HIPIVR)
R/W 0x0000_0000 14.5.7.4/14-92
0xBC8 PCI Express Host Write DMA Interrupt Vector Register
(PEX_HWDIVR)
R/W 0x0000_0000 14.5.7.5/14-93
0xBD0 PCI Express Host Read DMA Interrupt Vector Register
(PEX_HRDIVR)
R/W 0x0000_0000 14.5.7.6/14-93
0xBD8 PCI Express Host Miscellaneous Interrupt Vector Register
(PEX_HMIVR)
R/W 0x0000_0000 14.5.7.7/14-94
CSB System Interrupts Registers
0xBE0 CSB System PIO Interrupt Enable Register (PEX_CSPIER) R/W 0x0000_0000 14.5.8.1/14-94
Table A-20. PCI Express Controller Registers
PCI Express—Block Base Address 0x0_9000
Offset Register Access Reset Section/Page