Information

General Purpose I/O (GPIO)
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 21-3
21.3.1 GPIO Direction Register (GPDIR)
The GPIO direction registers (GPDIR), shown in Figure 21-2, defines the direction of the individual ports.
Table 21-3 defines the bit fields of GPDIR.
21.3.2 GPIO Open Drain Register (GPODR)
The GPIO open drain register (GPODR), shown in Figure 21-3, defines the way individual ports drive
their output.
Table 21-4 defines the bit fields of GPODR.
Offset 0xC00 Access: Read/write
0 23 24 31
R
Dn —
W
Reset All zeros
Figure 21-2. GPIO Direction Register (GPDIR)
Table 21-3. GPDIR Bit Settings
Bits Name Description
0–23 Dn Direction. Indicates whether a signal is used as an input or an output.
0 The corresponding signal is an input.
1 The corresponding signal is an output.
24–31 — Reserved
Offset 0xC04 Access: Read/write
0 23 24 31
R
Dn —
W
Reset All zeros
Figure 21-3. GPIO Open Drain Register (GPODR)
Table 21-4. GPODR Bit Settings
Bits Name Description
0–23 Dn Open-drain configuration. Indicates whether a signal is actively driven as an output or an open-drain driver.
This register has no effect on signals programmed as inputs in the corresponding GPDIR.
0 The I/O signal is actively driven as an output.
1 The I/O signal is an open-drain driver. As an output, the signal is driven active-low, otherwise it is
three-stated.
24–31 — Reserved