Information

Serial Peripheral Interface

MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1

Freescale Semiconductor 19-13

19.3.1.4 SPI Command Register (SPCOM)

The SPI command register (SPCOM), shown in Figure 19-9, is used to end SPI operation.

Table 19-7 describes the SPCOM fields.

19.3.1.5 SPI Transmit Data Hold Register (SPITD)

SPITD holds the character to be transmitted. The number of bits in each character is specified by

SPMODE[LEN]. Each time SPIE[NF] is set, the core can write another character of data to SPITD, if there

is no error indication in the SPIE. At the end of the frame the core should set SPCOM[LST] and prepare

the last character of data. Figure 19-10 shows the SPI transmit data hold register.

Table 19-8 shows the field descriptions of the SPI transmit data hold register.

Offset 0x02C Access: Write only

08910 31

—

WLST

Reset All zeros

Figure 19-9. SPI Command Register Definition

Table 19-7. SPCOM Field Descriptions

Bits Name Description

0–8 — Reserved, should be cleared.

9 LST This bit represents the last character. Should be set before the last character is written to the SPITD. This

results in SPIE[LT] being set when the character is fully transmitted and by that gives indication about the

frame being fully transmitted.

0 This character is not the last character of the frame

1 This character is the last character of the frame

10–31 — Reserved, should be cleared.

Offset 0x030 Access: Write only

0 31

WDATA

Reset All zeros

Figure 19-10. SPI Transmit Data Hold Register Definition

Table 19-8. SPI Transmit Data Hold Field Descriptions

Bits Name Description

0–31 DATA These bits are the data to be sent.