Information

DUART
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
Freescale Semiconductor 18-11
After initializing ULCR, the software should not rewrite the ULCR while valid transfers on the UART bus
are active. The software should not rewrite the ULCR until the last STOP bit is received and no new
characters are being transferred on the bus.
The stick parity bit, ULCR[SP], assigns a set parity value for the parity bit time slot sent on the UART bus.
The set value is defined as mark parity (logic 1) or space parity (logic 0). ULCR[PEN] and ULCR[EPS]
help determine the set parity value. See Table 18-14. ULCR[NSTB] defines the number of STOP bits to
be sent at the end of the data transfer. The receiver checks only the first STOP bit, regardless of the number
of STOP bits selected. The word length select bits (1 and 0) define the number of data bits transmitted or
received as a serial character. The word length does not include START, parity, and STOP bits.
Figure 18-9 shows the bits in the ULCRs.
Table 18-13 describes the ULCR fields.
Offset: 0x0_4503, 0x0_4603 Access: User read/write
01234567
R
DLAB SB SP EPS PEN NSTB WLS
W
Reset All zeros
Figure 18-9. Line Control Register (ULCR1 and ULCR2)
Table 18-13. ULCR Field Descriptions
Bits Name Description
0 DLAB Divisor latch access bit
0 Access to all registers except UDLB, UAFR, and UDMB.
1 Ability to access UDMB, UDLB, and UAFR.
1 SB Set break
0 Send normal UTHR data onto the SOUT signal.
1 Force logic 0 to be on SOUT. Data in the UTHR is not affected.
2 SP Stick parity
0 Stick parity is disabled.
1 If PEN = 1 and EPS = 1, space parity is selected; if PEN = 1 and EPS = 0, mark parity is selected.
3 EPS Even parity select. See Table 18-14.
0 If PEN = 1 and SP = 0 then odd parity is selected.
1 If PEN = 1 and SP = 0 then even parity is selected.
4 PEN Parity enable
0 No parity generation and checking.
1 Generate parity bit as a transmitter, and check parity as a receiver.
5 NTSB Number of STOP bits
0 One STOP bit is generated in the transmitted data.
1 When a 5-bit data length is selected, 1 1/2 STOP bits are generated. When either a 6-, 7-, or 8-bit word
length is selected, two STOP bits are generated.
6–7 WLS Word length select. Number of bits that comprise the character length.
00 5 bits
01 6 bits
10 7 bits
11 8 bits