Information

Enhanced Three-Speed Ethernet Controllers
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
16-162 Freescale Semiconductor
Figure 16-129 depicts the buffer format requirements for time-stamp insertion on transmit packets.
Figure 16-129. Buffer Format for Transmit Time-Stamp Insertion
16.6.6.5.2 Error Condition
When an error is encountered after a PTP packet has begun to be processed, the time-stamp written to the
TxPAL is zero. Subsequent frames may be flushed by eTSEC. There will be no time-stamp update to
TxPAL for the subsequent flushed frames.
16.6.6.6 Tx PTP Packet Parsing
Software instructs the Tx packet to be timestamped via setting bit 15 in the TxFCB to mark a PTP packet.
TxFCB[VLCTL] can be translated as the Tx PTP packet identification number. BD[TOE] must be set to
enable transmit PTP packet time stamping. TxFCB[PTP] bit takes precedence over TxFCB[VLN] bit. It
disables per packet VLAN tag insertion. On a PTP packet, a VLAN tag can be inserted from the DFVLAN
register. The TxFCB for the PTP packet is shown in Figure 16-130.
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Offset + 0 VLN IP IP6 TUP UDP CIP CTU NPH PTP
Offset + 2 L4OS L3OS
Offset + 4 PHCS
Offset + 6 VLCTL/PTP_ID
Figure 16-130. Transmit Frame Control Block
Data Buffer Pointer
TX BD Ring
TOE=1
FCB
8 Bytes
0123 7...
External Memory
TxPAL
FRAME
TxFCB
Data Buffer Length=8
Data Buffer Pointer
Data Buffer Length=M
32B cache-lines
Unknown
Unknown
TxPAL
TxPAL