Information

Enhanced Three-Speed Ethernet Controllers
MPC8308 PowerQUICC II Pro Processor Reference Manual, Rev. 1
16-140 Freescale Semiconductor
of the CPU cycles that would otherwise be spent by the TCP/IP stack. IP packet fragmentation and
re-assembly, and TCP stream establishment and tear-down are not performed in hardware. The frame
parser sets RQFPR[IPF] status flag encountering a fragmented frame. The frame parser in eTSEC searches
a maximum of 512 bytes from the start of a received frame when attempting to locate headers; headers
deeper than 512 bytes are assumed not to exist, and any associated receive status flags in the frame control
block remain cleared.
On transmit, TOE provides IPv4 and TCP/UDP header checksum generation. Like receive TOE,
checksum generation reduces CPU load significantly for TCP/IP stacks modified to exploit eTSEC TOE
functions. The eTSEC does not checksum transmitted packets with IPv6 routing headers or calculate
TCP/UDP checksums from IP fragments. If a transmitted TCP segment requires checksum generation but
IPv6 extension headers would prevent eTSEC from calculating the pseudo-header checksum, software can
calculate just the pseudo-header checksum in advance and supply it to the eTSEC as part of per-frame TOE
configuration.
16.6.3.1 Frame Control Blocks
Frame control blocks (FCBs) are 8-byte blocks of TOE control and/or status data that are passed between
software (driver and TCP/IP stack) and each eTSEC. A FCB always precedes the frame it applies to, and
is present only when TOE functions are being used. As Figure 16-122 shows, the first BD of each frame
points to the initial data buffer and the FCB. The initial data buffer must be at least 8 bytes long to contain
the FCB without breaking it. Custom or received Ethernet preamble sequences also follow the FCB if
preambles are visible.
Figure 16-122. Location of Frame Control Blocks for TOE Parameters
For TxBD rings, FCBs are assumed present when the TxBD[TOE/UN] bit is set by user software. The
eTSEC ignores the TxBD[TOE/UN] bit in all BDs other than those pointing to initial data buffers,
therefore FCBs must not be inserted in second and subsequent data buffers. Since TxBD[TOE/UN] can be
set under software discretion, TOE acceleration for transmit may be applied on a frame-by-frame basis.
In the case of RxBD rings, FCBs are inserted by the eTSEC whenever RCTRL[PRSDEP] is set to a
non-zero value. Only one FCB is inserted per frame, in the buffer pointed to by the RxBD with bit F set.
TOE acceleration for receive is enabled for all frames in this case.
FCB
Frame data, first buffer
Frame data, second buffer
BD
(first)
BD
(last)
BD BD BD
BD ring
L2 HDR L3 HDR L4 HDR
(last)
L3OS L4OS