Datasheet

MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 3
Freescale Semiconductor 75
Thermal
22.1 Thermal Characteristics
This table provides the package thermal characteristics for the 473, 19  19 mm MAPBGA.
22.2 Thermal Management Information
For the following sections, P
D
= (V
DD
 I
DD
) + P
I/O
, where P
I/O
is the power dissipation of the I/O drivers.
22.2.1 Estimation of Junction Temperature with Junction-to-Ambient
Thermal Resistance
An estimation of the chip junction temperature, T
J
, can be obtained from the equation:
T
J
= T
A
+ (R
 JA
 P
D
)
where:
T
J
= junction temperature (C)
T
A
= ambient temperature for the package (C)
R
 JA
= junction-to-ambient thermal resistance (C/W)
P
D
= power dissipation in the package (W)
The junction-t-ambient thermal resistance is an industry standard value that provides a quick and easy
estimation of thermal performance. As a general statement, the value obtained on a single layer board is
Table 59. Package Thermal Characteristics for MAPBGA
Characteristic Board Type Symbol Value Unit Note
Junction to Ambient Natural Convection Single layer board (1s)
R
JA
42 °C/W 1, 2
Junction to Ambient Natural Convection Four layer board (2s2p)
R
JA
27 °C/W 1, 2, 3
Junction to Ambient (@200 ft/min) Single layer board (1s)
R
JMA
35 °C/W 1, 3
Junction to Ambient (@200 ft/min) Four layer board (2s2p)
R
JMA
24 °C/W 1, 3
Junction to Board —
R
JB
17 °C/W 4
Junction to Case —
R
JC
9°C/W5
Junction to Package Top Natural Convection

JT
2°C/W6
Notes:
1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)
temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal
resistance.
2. Per JEDEC JESD51-2 with the single layer board horizontal. Board meets JESD51-9 specification.
3. Per JEDEC JESD51-6 with the board horizontal.
4. Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is measured on
the top surface of the board near the package.
5. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method
1012.1).
6. Thermal characterization parameter indicating the temperature difference between package top and the junction temperature
per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JT.