Datasheet

MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 3
18 Freescale Semiconductor
Ethernet: Three-Speed Ethernet, MII Management
This figure shows the MII transmit AC timing diagram.
Figure 8. MII Transmit AC Timing Diagram
8.2.1.2 MII Receive AC Timing Specifications
This table provides the MII receive AC timing specifications.
Table 24. MII Receive AC Timing Specifications
At recommended operating conditions with LV
DD
/NV
DD
of 3.3 V ± 0.3V.
Parameter/Condition Symbol
1
Min Typ Max Unit
RX_CLK clock period 10 Mbps t
MRX
— 400 — ns
RX_CLK clock period 100 Mbps t
MRX
—40—ns
RX_CLK duty cycle t
MRXH
/t
MRX
35 — 65 %
RXD[3:0], RX_DV, RX_ER setup time to RX_CLK t
MRDVKH
10.0 — — ns
RXD[3:0], RX_DV, RX_ER hold time to RX_CLK t
MRDXKH
10.0 — — ns
RX_CLK clock rise V
IL
(min) to V
IH
(max) t
MRXR
1.0 — 4.0 ns
RX_CLK clock fall time V
IH
(max) to V
IL
(min) t
MRXF
1.0 — 4.0 ns
Note:
1. The symbols used for timing specifications herein follow the pattern of t
(first two letters of functional block)(signal)(state) (reference)(state)
for inputs and t
(first two letters of functional block)(reference)(state)(signal)(state)
for outputs. For example, t
MRDVKH
symbolizes MII
receive timing (MR) with respect to the time data input signals (D) reach the valid state (V) relative to the t
MRX
clock reference
(K) going to the high (H) state or setup time. Also, t
MRDXKL
symbolizes MII receive timing (GR) with respect to the time data
input signals (D) went invalid (X) relative to the t
MRX
clock reference (K) going to the low (L) state or hold time. Note that, in
general, the clock reference symbol representation is based on three letters representing the clock of a particular functional.
For example, the subscript of t
MRX
represents the MII (M) receive (RX) clock. For rise and fall times, the latter convention is
used with the appropriate letter: R (rise) or F (fall).
TX_CLK
TXD[3:0]
t
MTKHDX
t
MTX
t
MTXH
t
MTXR
t
MTXF
TX_EN
TX_ER