Datasheet

MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 3
10 Freescale Semiconductor
DDR2 SDRAM
6DDR2 SDRAM
This section describes the DC and AC electrical specifications for the DDR2 SDRAM interface. Note that
DDR2 SDRAM is GV
DD
(typ) = 1.8 V.
6.1 DDR2 SDRAM DC Electrical Characteristics
This table provides the recommended operating conditions for the DDR2 SDRAM component(s) when
GV
DD
(typ) = 1.8 V.
This table provides the DDR2 capacitance when GV
DD
(typ) = 1.8 V.
Table 13. DDR2 SDRAM DC Electrical Characteristics for GV
DD
(typ) = 1.8 V
Parameter/Condition Symbol Min Max Unit Note
I/O supply voltage GV
DD
1.7 1.9 V 1
I/O reference voltage MV
REF
0.49  GV
DD
0.51  GV
DD
V2
I/O termination voltage V
TT
MV
REF
–0.04 MV
REF
+ 0.04 V 3
Input high voltage V
IH
MV
REF
+ 0.125 GV
DD
+0.3 V —
Input low voltage V
IL
–0.3 MV
REF
–0.125 V —
Output leakage current I
OZ
–9.9 9.9 A4
Output high current (V
OUT
= 1.420 V) I
OH
–13.4 — mA —
Output low current (V
OUT
= 0.280 V) I
OL
13.4 — mA —
Notes:
1. GV
DD
is expected to be within 50 mV of the DRAM GV
DD
at all times.
2. MV
REF
is expected to be equal to 0.5  GV
DD
, and to track GV
DD
DC variations as measured at the receiver.
Peak-to-peak noise on MV
REF
may not exceed ±2% of the DC value.
3. V
TT
is not applied directly to the device. It is the supply to which far end signal termination is made and is expected to be
equal to MV
REF
. This rail should track variations in the DC level of MV
REF
.
4. Output leakage is measured with all outputs disabled, 0 V  V
OUT
GV
DD
.
Table 14. DDR2 SDRAM Capacitance for GV
DD
(typ)=1.8 V
Parameter/Condition Symbol Min Max Unit Notes
Input/output capacitance: DQ, DQS, DQS C
IO
68pF1
Delta input/output capacitance: DQ, DQS, DQS C
DIO
—0.5pF1
Note:
1. This parameter is sampled. GV
DD
= 1.8 V ± 0.090 V, f = 1 MHz, T
A
= 25°C, V
OUT
= GV
DD
/2, V
OUT
(peak-to-peak) = 0.2 V.