Datasheet

MPC8250 Hardware Specifications, Rev. 2
60 Freescale Semiconductor
Document Revision History
0.6 10/2002 Ta bl e 2 2 , “VR Pinout”: corrected ball assignment for the following pins—A12–A17, TA, PD5, PC2.
0.5 9/2002 Addition of VR (516 PBGA) package information. Refer to sections 2.2, 4.2, and 5.
0.4 5/2002 • Ta bl e 2 : Notes 2 and 3
• Addition of note on page 8:VDDH and VDD tracking
• Ta bl e 1 4 : Note 3
• Ta bl e 1 6 : Note 1
• Ta bl e 1 8 : Note 3
0.3 3/2002 • Ta bl e 2 0: modified note to pin AF25.
0.2 3/2202 • Ta bl e 2 0: modified notes to pins AE11 and AF25.
• Ta bl e 2 0 : added note to pins AA1 and AG4 (Therm0 and Therm1).
0.1 2/2002 • Note 2 for Table 4 (changes in italics): “...greater than
or equal to 266 MHz, 200 MHz CPM...”
• Ta bl e 1 8 : core and bus frequency values for the following ranges of MODCK_HMODCK:
0011_000 to 0011_100 and 1011_000 to 1011_1000
• Ta bl e 2 0 : footnotes added to pins at AE11, AF25, U5, and V4.
0 11/2001 Initial version
Table 24. Document Revision History (continued)
Revision Date Substantive Changes