Datasheet

MPC8250 Hardware Specifications, Rev. 2
16 Freescale Semiconductor
Electrical and Thermal Characteristics
Figure 8 shows PIO, timer, and DMA signals.
Figure 8. PIO, Timer, and DMA Signal Diagram
Table 9 lists SIU input characteristics.
Table 9. AC Characteristics for SIU Inputs
1
1
Input specifications are measured from the 50% level of the signal to the 50% level of the rising edge of CLKIN.
Timings are measured at the pin.
Spec Number
Characteristic
Setup (ns) Hold (ns)
Max Min 66 MHz 83 MHz 66 MHz 83 MHz
sp11 sp10 AACK
/ARTRY/TA/TS/TEA/DBG/BG/BR 650.50.5
sp12 sp10 Data bus in normal mode 5 4 0.5 0.5
sp13 sp10 Data bus in ECC and PARITY modes 8 6 0.5 0.5
sp14 sp10 DP pins 7 6 0.5 0.5
sp15 sp10 All other pins 5 4 0.5 0.5
Sys clk
PIO/IDMA/TIMER[TGATE assertion] input signals
IDMA output signals
sp22
sp23
sp42/sp43
TIMER(sp42/43)/ PIO(sp42a/sp43a)
sp42a/sp43a
output signals
sp42/sp43
TIMER input signal [TGATE deassertion]
sp22
sp23
Note: TGATE is asserted on the rising edge of the clock; it is deasserted on the falling edge.
(See note)
(See note)