Datasheet

MPC8250 Hardware Specifications, Rev. 2
14 Freescale Semiconductor
Electrical and Thermal Characteristics
Figure 4 shows the FCC internal clock.
Figure 4. FCC Internal Clock Diagram
Figure 5 shows the SCC/SMC/SPI/I
2
C external clock.
Figure 5. SCC/SMC/SPI/I
2
C External Clock Diagram
BRG_OUT
FCC input signals
FCC output signals
FCC output signals
Note: When GFMR.TCI = 1
Note: When GFMR.TCI = 0
sp36a/sp37a
sp36a/sp37a
sp17a
sp16a
Serial CLKin
SCC/SMC/SPI/I2C input signals
SCC/SMC/SPI/I2C output signals
sp18b
sp19b
sp38b/sp39b
(See note.)
(See note.)
Note: There are four possible timing conditions for SCC and SPI:
1. Input sampled on the rising edge and output driven on the rising edge (shown).
2. Input sampled on the rising edge and output driven on the falling edge.
3. Input sampled on the falling edge and output driven on the falling edge.
4. Input sampled on the falling edge and output driven on the rising edge.