Datasheet

MPC5200B Data Sheet, Rev. 4
Freescale Semiconductor 3
Figure 1 shows a simplified MPC5200B block diagram.
Figure 1. Simplified Block Diagram—MPC5200B
603
e300 Core
SDRAM/DDR
JTAG / COP
Interface
Reset / Clock
MSCAN
SDRAM/DDR
CommBus
Local
BestComm
SRAM
Bus
J1850
USBSPI
I
2
C
Ethernet
PSC
Memory Controller
Generation
16 KB
DMA
Systems Interface Unit (SIU)
Real-Time Clock
System Functions
Interrupt Controller
GPIO/Timers
Local Plus Controller
PCI Bus Controller
ATA Host Controller
2x
6x
2x
2x