Datasheet

Electrical and Thermal Characteristics
MPC5200 Data Sheet, Rev. 4
Freescale Semiconductor 55
Figure 39. Timing Diagram — 8,16, 24, and 32-bit CODEC / I
2
S Slave Mode
3.3.15.2 AC97 Mode
NOTE
Output timing was specified at a nominal 50 pF load.
Table 44. Timing Specifications — AC97 Mode
Sym Description Min Typ Max Units SpecID
1 Bit Clock cycle time — 81.4 — ns A15.15
2 Clock pulse high time — 40.7 — ns A15.16
3 Clock pulse low time — 40.7 — ns A15.17
4 Frame valid after rising clock edge — — 13.0 ns A15.18
5 Output Data valid after rising clock edge — — 14.0 ns A15.19
6 Input Data setup time 1.0 — — ns A15.20
7 Input Data hold time 1.0 — — ns A15.21
BitClk
3
(CLKPOL=0)
BitClk
(CLKPOL=1)
Frame
(SyncPol = 1)
TxD
Output
Input
Input
4
5
Input
Frame
(SyncPol = 0)
Input
RxD
Input
1
22
6