Datasheet

MPC5200 Data Sheet, Rev. 4
Electrical and Thermal Characteristics
Freescale Semiconductor44
3.3.9 Ethernet
AC Test Timing Conditions:
Output Loading
All Outputs: 25 pF
Figure 28. Ethernet Timing Diagram—MII Rx Signal
Table 31. MII Rx Signal Timing
Sym Description Min Max Unit SpecID
M1 RXD[3:0], RX_DV, RX_ER to RX_CLK setup 10 ns A9.1
M2 RX_CLK to RXD[3:0], RX_DV, RX_ER hold 10 ns A9.2
M3 RX_CLK pulse width high 35% 65% RX_CLK Period
1
NOTES:
1
RX_CLK shall have a frequency of 25% of data rate of the received signal. See the IEEE 802.3 Specification [6].
A9.3
M4 RX_CLK pulse width low 35% 65% RX_CLK Period
1
A9.4
M4
M3
M1
M2
RX_CLK (Input)
RXD[3:0] (inputs)
RX_DV
RX_ER