Datasheet

Electrical and Thermal Characteristics
MPC5200 Data Sheet, Rev. 4
Freescale Semiconductor 27
NOTES:
1. See the timing measurement conditions in the PCI Local Bus Specification [4]. It is important that all driven signal transitions
drive to their Voh or Vol level within one Tcyc.
2. Minimum times are measured at the package pin with the load circuit, and maximum times are measured with the load circuit
as shown in the PCI Local Bus Specification [4].
3. REQ# and GNT# are point-to-point signals and have different input setup times than do bused signals. GNT# and REQ#
have a setup of 5 ns at 66 MHz. All other signals are bused.
4. See the timing measurement conditions in the PCI Local Bus Specification [4].
For Measurement and Test Conditions, see the PCI Local Bus Specification [4].
Table 23. PCI Timing Parameters
Sym Description
66 MHz 33 MHz
Units Notes SpecID
Min Max Min Max
T
val
CLK to Signal Valid Delay - bused
signals
2 6 2 11 ns 1,2,3 A6.5
T
val
(ptp) CLK to Signal Valid Delay - point
to point
2 6 2 12 ns 1,2,3 A6.6
T
on
Float to Active Delay 2 2 ns 1 A6.7
T
off
Active to Float Delay 14 28 ns 1 A6.8
T
su
Input Setup Time to CLK - bused
signals
3 7 ns 3,4 A6.9
T
su
(ptp) Input Setup Time to CLK - point
to point
5 10,12 ns 3,4 A6.10
T
h
Input Hold Time from CLK 0 0 ns 4 A6.11