Datasheet

MPC5200 Data Sheet, Rev. 4
Electrical and Thermal Characteristics
Freescale Semiconductor26
Figure 10. PCI CLK Waveform
NOTES:
1. In general, all 66-MHz PCI components must work with any clock frequency up to 66 MHz. CLK requirements vary
depending upon whether the clock frequency is above 33 MHz.
2. Rise and fall times are specified in terms of the edge rate measured in V/ns. This slew rate must be met across the minimum
peak-to-peak portion of the clock waveform as shown in Figure 10.
3. The minimum clock period must not be violated for any single clock cycle, i.e., accounting for all system jitter.
Table 22. PCI CLK Specifications
Sym Description
66 MHz 33 MHz
Units Notes SpecID
Min Max Min Max
T
cyc
PCI CLK Cycle Time 15 30 30 ns 1,3 A6.1
T
high
PCI CLK High Time 6 11 ns A6.2
t
low
PCI CLK Low Time 6 A6.3
- PCI CLK Slew Rate 1.5 4 1 4 V/ns 2 A6.4
T
cyc
PCI CLK
T
low
T
high
0.4Vcc
0.4Vcc, p-to-p
0.3Vcc
0.5Vcc
0.6Vcc
0.2Vcc
(minimum)