Datasheet

Revision History
Freescale Semiconductor B-11
Table 26-1/Page
26-5
Change description field for DTOUT1 from “DMA timer 1 output / Port TD[3]...” to “DMA timer 1 output /
Port TD[2]...”
Change description field for DTIN0 from “DMA timer 0 input / Port TD[3]...” to “DMA timer 1 output / Port
TD[1]...”
Change description field for DTOUT0 from “DMA timer 0 output / Port TD[3]...” to “DMA timer 1 output /
Port TD[0]...”
Chapter 27 The CLKMOD pins determine the clock mode regardless of RCON
assertion during reset. Because of
this, the following were done for clarity:
• Removed the RCON[RPLLREF, RPLLSEL] bit fields and descriptions.
• Added the following note in the Reset Configuration section: “The CLKMOD pins always determine the
clock mode, regardless of the RCON
pin value.”
• In the Configuration During Reset table, Clock Mode section, changed the Default Configuration from
“RCON[7:6]” to “N/A”
• In Clock Mode Selection section, changed “The clock mode is selected during reset and reflected...” to
“The clock mode is selected during reset by the CLKMOD pins and reflected...”
• In Clock Mode Selection table, added CLKMOD[1:0] column showing the corresponding CLKMOD
settings for each mode.
Table 30-12/Page
30-14
Add the following note to the PBR[Address] field description:
Note: PBR[0] should always be loaded with a 0.
Table 30-20/Page
30-35
Change CSR’s initial state to 0x0000_0000.
Chapter 33 Add the following note:
“It is crucial during power-up that VDD never exceeds VDDH by more that ~0.3V. There are diode
devices between the two voltage domains, and violating this rule can lead to a latch-up condition.”
Table 33-3/Page
33-3
In the V
OH
and V
OL
entries, change the respective I
OH
and I
OL
specs from “I
OH
= -2.0mA” to
“I
OH
= -5.0mA” and “I
OL
= +2.0mA” to “I
OL
= +5.0mA”
Table 33-8/Page
33-7
In the PLL Electrical Specifications table, only specs for the 80MHz MCF5282 device were listed. Insert
specs for the 66MHz device in the first 2 rows and also declare symbol f
sys(max)
, as shown below:
Table 33-8/Page
33-7
Change EXTAL Input High Voltage (V
IHEXT
) Crystal Mode minimum spec from “V
DD
-1.0” to
“V
XTAL
+0.4”.
Change EXTAL Input Low Voltage (V
ILEXT
) Crystal Mode maximum spec from “1.0” to “V
XTAL
-0.4”.
Section
33.13.1/Page
33-21
Remove second sentence:
“There is no minimum frequency requirement.”
Table B-7. Rev. 2.3 to Rev. 3 Changes (continued)
Location Description
Characteristic Symbol Min
Max
Unit
66MHz 80MHz
PLL Reference Frequency Range
Crystal reference
External reference
1:1 Mode
f
ref_crystal
f
ref_ext
f
ref_1:1
2
2
33.33
8.33
8.33
66.66
10.0
10.0
80
MHz
System Frequency
1
External Clock Mode
On-Chip PLL Frequency
f
sys
0
f
ref
/ 32
f
sys(max)
66.66
66.66
f
sys(max)
80
80
MHz
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3