Datasheet

Electrical Characteristics
33-20 Freescale Semiconductor
Figure 33-9. RSTI and Configuration Override Timing
33.12 I
2
C Input/Output Timing Specifications
Table 33-19 lists specifications for the I
2
C input timing parameters shown in Figure 33-10.
Table 33-20 lists specifications for the I
2
C output timing parameters shown in Figure 33-10.
Table 33-19. I
2
C Input Timing Specifications between SCL and SDA
Num Characteristic Min Max Units
I1 Start condition hold time 2 — Bus clocks
I2 Clock low period 8 — Bus clocks
I3 SCL/SDA rise time (V
IL
= 0.5 V to V
IH
= 2.4 V) — 1 mS
I4 Data hold time 0 — ns
I5 SCL/SDA fall time (V
IH
= 2.4 V to V
IL
= 0.5 V) — 1 mS
I6 Clock high time 4 — Bus clocks
I7 Data setup time 0 — ns
I8 Start condition setup time (for repeated start condition only) 2 — Bus clocks
I9 Stop condition setup time 2 — Bus clocks
Table 33-20. I
2
C Output Timing Specifications between SCL and SDA
Num Characteristic Min Max Units
I1
1
Start condition hold time 6 — Bus clocks
I2
1
Clock low period 10 — Bus clocks
I3
2
SCL/SDA rise time (V
IL
= 0.5 V to V
IH
= 2.4 V) — — µS
I4
1
Data hold time 7 — Bus clocks
I5
3
SCL/SDA fall time (V
IH
= 2.4 V to V
IL
= 0.5 V) — 3 ns
I6
1
Clock high time 10 — Bus clocks
I7
1
Data setup time 2 — Bus clocks
R1
R2
CLKOUT
RSTI
RSTO
R3
R4
R8
R7R6R5
Configuration Overrides:
R4
(RCON, Override pins)
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3