Datasheet

Chip Configuration Module (CCM)
27-10 Freescale Semiconductor
27.6.6 Chip Select Configuration
The chip select configuration (CS[6:4]) is selected during reset and reflected in the RCSC field of the CCR.
Once reset is exited, the chip select configuration cannot be changed. Table 27-8 shows the different chip
select configurations that can be implemented during reset configuration.
27.7 Reset
Reset initializes CCM registers to a known startup state as described in Section 27.5, “Memory Map and
Registers.” The CCM controls chip configuration at reset as described in Section 27.6, “Functional
Description.”
27.8 Interrupts
The CCM does not generate interrupt requests.
Table 27-11. Clock Mode Selection
Clock Mode CLKMOD[1:0]
Synthesizer Status Register (SYNSR)
PLLSEL PLLREF PLLMOD
External clock mode (PLL disabled) 00 0 0 0
1:1 PLL mode 01 0 0 1
Normal PLL mode, external clock reference 10 1 0 1
Normal PLL mode, crystal oscillator reference 11 1 1 1
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3