Datasheet

Table Of Contents
Clock Module
Freescale Semiconductor 9-5
9.5.2 XTAL
This output is an internal oscillator connection to the external crystal.
9.5.3 CLKOUT
This output reflects the internal system clock.
9.5.4 CLKMOD[1:0]
These inputs are used to select the clock mode during chip configuration.
9.5.5 RSTOUT
The RSTOUT pin is asserted by one of the following:
Internal system reset signal
FRCRSTOUT bit in the reset control status register (RCR); see Section 29.4.1, “Reset Control
Register (RCR).”
9.6 Memory Map and Registers
The clock module programming model consists of these registers:
Synthesizer control register (SYNCR), which defines clock operation
Synthesizer status register (SYNSR), which reflects clock status
9.6.1 Module Memory Map
Table 9-3. Clock Module Memory Map
IPSBAR Offset Register Name Access
1
1
S = CPU supervisor mode access only.
0x0012_0000 Synthesizer Control Register (SYNCR) S
0x0012_0002 Synthesizer Status Register (SYNSR) S
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3