Datasheet

MCF5208 ColdFire
®
Microprocessor Data Sheet, Rev. 3
Revision History
Freescale Semiconductor44
0.4 10/10/2005 • Figure 1 and Tabl e 3: Changed pin 33 from EVDD to SD_VDD
• Figure 4 and Tabl e 3: Changed ball D10 from TEST to VSS
• Figure 6 and Ta ble 3: Changed pin 39 from EVDD to SD_VDD and pin 117
from TEST to VSS
0.5 3/29/2006 • Added “top view” and “bottom view” labels where appropriate to
mechanical drawings and pinouts.
• Updated mechanical drawings to latest available, and added note to
Section 4, “Mechanicals and Pinouts.”
0.6 7/21/2006 • Corrected cross-reference to Figure 9 in Section 4.7, “Pinout—196
MAPBGA.”
• Corrected L3 label in Figure 9 from SD_DR_DQS to SD_SDR_DQS.
• Corrected L6 label in Figure 9 from SD_DQS0 to SD_DQS2 and H3 from
SD_DQS1 to SD_DQS3.
• Removed second sentence from Section 5.12.2, “MII Transmit Signal
Timing (FEC_TXD[3:0], FEC_TXEN, FEC_TXER, FEC_TXCLK),”
regarding no minimum frequency requirement for TXCLK.
• Removed third and fourth paragraphs from Section 5.12.2, “MII Transmit
Signal Timing (FEC_TXD[3:0], FEC_TXEN, FEC_TXER, FEC_TXCLK),”
as this feature is not supported on this device.
1 3/28/2007 • Removed preliminary designation from Section 5, “Electrical
Characteristics.”
• Updated Section 5.2, “Thermal Characteristics.”
• Updated Section 5.4, “DC Electrical Specifications.”
• Added Section 5.5, “Current Consumption.”
• Updated Section 5.6, “Oscillator and PLL Electrical Characteristics.”
• Made some corrections to the drawings in Section 5.8, “SDRAM Bus.”
• Edited for grammar, punctuation, spelling, style, and format. - JD
2 12/4/2008 • Updated FlexBus read and write timing diagrams in Figure 14 and
Figure 15.
Changed the following specs in Ta bl e 12 and Ta bl e 13 :
• Minimum frequency of operation from TBD to 60MHz
• Maximum clock period from TBD to 16.67 ns
3 9/1/2009 • Changed doc type from Advance Information to Technical Data
Table 26. Revision History (continued)
Revision
Number
Date Substantive Changes