Datasheet

MCF5208 ColdFire

Microprocessor Data Sheet, Rev. 3

Electrical Characteristics

Freescale Semiconductor42

5.16 Debug AC Timing Specifications

Table 25 lists specifications for the debug AC timing parameters shown in Figure 32.

Figure 32. Real-Time Trace AC Timing

Figure 33. BDM Serial Port AC Timing

Table 25. Debug AC Timing Specification

Num Characteristic Min Max Unit

D0 PSTCLK cycle time 1 1 t

SYS

D1 PSTCLK rising to PSTDDATA valid — 3.0 ns

D2 PSTCLK rising to PSTDDATA invalid 1.5 — ns

DSI-to-DSCLK setup 1 — PSTCLK

NOTES:

DSCLK and DSI are synchronized internally. D4 is measured from the synchronized

DSCLK input relative to the rising edge of PSTCLK.

DSCLK-to-DSO hold 4 — PSTCLK

D5 DSCLK cycle time 5 — PSTCLK

D6 BKPT assertion time 1 — PSTCLK

PSTCLK

PSTDDATA[7:0]

Past

Current

DSCLK

DSI

DSO

Current