Datasheet

MCF5208 ColdFire
®
Microprocessor Data Sheet, Rev. 3
Electrical Characteristics
Freescale Semiconductor34
Figure 20. GPIO Timing
5.10 Reset and Configuration Override Timing
Figure 21. RESET and Configuration Override Timing
Table 15. Reset and Configuration Override Timing
Num Characteristic Symbol Min Max Unit
R1 RESET
Input valid to FB_CLK High t
RVCH
9—ns
R2 FB_CLK High to RESET Input invalid t
CHRI
1.5 — ns
R3 RESET Input valid Time
1
NOTES:
1
During low power STOP, the synchronizers for the RESET input are bypassed and RESET is asserted asynchronously to
the system. Thus, RESET
must be held a minimum of 100 ns.
t
RIVT
5—t
CYC
R4 FB_CLK High to RSTOUT Valid t
CHROV
—10ns
R5 RSTOUT valid to Config. Overrides valid t
ROVCV
0—ns
R6 Configuration Override Setup Time to RSTOUT invalid t
COS
20 — t
CYC
R7 Configuration Override Hold Time after RSTOUT invalid t
COH
0—ns
R8 RSTOUT invalid to Configuration Override High Impedance t
ROICZ
—1t
CYC
G1
FB_CLK
GPIO Outputs
G2
G3 G4
GPIO Inputs
R1
R2
FB_CLK
RESET
RSTOUT
R3
R4
R8
R7R6R5
Configuration Overrides*:
R4
(RCON, Override pins)