Datasheet

MCF5208 ColdFire
®
Microprocessor Data Sheet, Rev. 3
Electrical Characteristics
Freescale Semiconductor26
All other timing relationships can be derived from these values. Timings
listed in Table 11 are shown in Figure 14 and Figure 15.
Figure 13. General Input Timing Requirements
5.7.1 FlexBus
FlexBus is a multi-function external bus interface provided to interface to slave-only devices up to a
maximum bus frequency of 83.33 MHz. It can be directly connected to asynchronous or synchronous
devices such as external boot ROMs, flash memories, gate-array logic, or other simple target (slave)
devices with little or no additional circuitry. For asynchronous devices, a simple chip-select based interface
can be used. The FlexBus interface has six general purpose chip-selects (FB_CS[5:0]) that can be
configured to be distributed between the FlexBus or SDRAM memory interfaces. Chip-select FB_CS
[0]
can be dedicated to boot ROM access and can be programmed to be byte (8 bits), word (16 bits), or
longword (32 bits) wide. Control signal timing is compatible with common ROM/flash memories.
Invalid Invalid
FB_CLK(75MHz)
T
SETUP
T
HOLD
Input Setup And Hold
1.5V
t
rise
V
h
= V
IH
V
l
= V
IL
1.5V1.5V Valid
t
fall
V
h
= V
IH
V
l
= V
IL
Input Rise Time
Input Fall Time
* The timings are also valid for inputs sampled on the negative clock edge.
Inputs
FB_CLK
FB4
FB5