Datasheet

Chapter 2 Port Integration Module (PIM9C32) Block Description
Freescale Semiconductor MC9S12C-Family / MC9S12GC-Family 89
Rev 01.24
2.3.2.3 Port M Registers
2.3.2.3.1 Port M I/O Register (PTM)
Read: Anytime.
Write: Anytime.
If the data direction bits of the associated I/O pins are set to 1, a read returns the value of the port register,
otherwise the value at the pins is read.
The SPI pin configurations (PM[5:2]) is determined by several status bits in the SPI module. Please refer
to the SPI Block User Guide for details.
2.3.2.3.2 Port M Input Register (PTIM)
Read: Anytime.
Write: Never, writes to this register have no effect.
Module Base + 0x0010
76543210
R0 0
PTM5 PTM4 PTM3 PTM2 PTM1 PTM0
W
MSCAN/
SPI
— — SCK MOSI
SS MISO TXCAN RXCAN
Reset 0 0 0 00000
= Unimplemented or Reserved
Figure 2-17. Port M I/O Register (PTM)
Module Base + 0x0011
76543210
R 0 0 PTIM5 PTIM4 PTIM3 PTIM2 PTIM1 PTIM0
W
Reset — — ——————
= Unimplemented or Reserved
Figure 2-18. Port M Input Register (PTIM)
Table 2-16. PTIM Field Descriptions
Field Description
5–0
PTIM[5:0]
Port M Input Register — This register always reads back the status of the associated pins. This also can be
used to detect overload or short circuit conditions on output pins.