Datasheet

Chapter 2 Port Integration Module (PIM9C32) Block Description
88 MC9S12C-Family / MC9S12GC-Family Freescale Semiconductor
Rev 01.24
2.3.2.2.6 Port S Polarity Select Register (PPSS)
Read: Anytime.
Write: Anytime.
2.3.2.2.7 Port S Wired-OR Mode Register (WOMS)
Read: Anytime.
Write: Anytime.
Module Base + 0x000D
76543210
R0000
PPSS3 PPSS2 PPSS1 PPSS0
W
Reset 0 0 0 00000
= Unimplemented or Reserved
Figure 2-15. Port S Polarity Select Register (PPSS)
Table 2-14. PPSS Field Descriptions
Field Description
3–0
PPSS[3:0]
Pull Select Port S — This register selects whether a pull-down or a pull-up device is connected to the pin.
0 A pull-up device is connected to the associated port S pin, if enabled by the associated bit in register PERS
and if the port is used as input or as wired-or output.
1 A pull-down device is connected to the associated port S pin, if enabled by the associated bit in register PERS
and if the port is used as input.
Module Base + 0x000E
76543210
R0000
WOMS3 WOMS2 WOMS1 WOMS0
W
Reset 0 0 0 00000
= Unimplemented or Reserved
Figure 2-16. Port S Wired-Or Mode Register (WOMS)
Table 2-15. WOMS Field Descriptions
Field Description
3–0
WOMS[3:0]
Wired-OR Mode Port S — This register configures the output pins as wired-or. If enabled the output is driven
active low only (open-drain). A logic level of “1” is not driven. This bit has no influence on pins used as inputs.
0 Output buffers operate as push-pull outputs.
1 Output buffers operate as open-drain outputs.