Datasheet
Chapter 2 Port Integration Module (PIM9C32) Block Description
Freescale Semiconductor MC9S12C-Family / MC9S12GC-Family 85
Rev 01.24
2.3.2.2 Port S Registers
2.3.2.2.1 Port S I/O Register (PTS)
Read: Anytime.
Write: Anytime.
If the data direction bits of the associated I/O pins are set to 1, a read returns the value of the port register,
otherwise the value at the pins is read.
The SCI port associated with transmit pin 1 is configured as output if the transmitter is enabled and the
SCI pin associated with receive pin 0 is configured as input if the receiver is enabled. Please refer to SCI
Block User Guide for details.
2.3.2.2.2 Port S Input Register (PTIS)
Read: Anytime.
Write: Never, writes to this register have no effect.
Module Base + 0x0008
76543210
R0000
PTS3 PTS2 PTS1 PTS0
W
SCI——————TXDRXD
Reset 0 0 0 00000
= Unimplemented or Reserved
Figure 2-10. Port S I/O Register (PTS)
Module Base + 0x0009
76543210
R 0 0 0 0 PTIS3 PTIS2 PTIS1 PTIS0
W
Reset 0 0 0 00000
= Unimplemented or Reserved
Figure 2-11. Port S Input Register (PTIS)
Table 2-10. PTIS Field Descriptions
Field Description
3–0
PTIS[3:0]
Port S Input Register — This register always reads back the status of the associated pins. This also can be
used to detect overload or short circuit conditions on output pins.