Datasheet

Chapter 2 Port Integration Module (PIM9C32) Block Description
Freescale Semiconductor MC9S12C-Family / MC9S12GC-Family 81
Rev 01.24
2.3.2.1 Port T Registers
2.3.2.1.1 Port T I/O Register (PTT)
Read: Anytime.
Write: Anytime.
If the data direction bits of the associated I/O pins are set to 1, a read returns the value of the port register,
otherwise the value at the pins is read.
If a TIM-channel is defined as output, the related port T is assigned to IOC function.
In addition to the possible timer functionality of port T pins PWM channels can be routed to port T. For
this the Module Routing Register (MODRR) needs to be configured.
Module Base + 0x0000
76543210
R
PTT7 PTT6 PTT5 PTT4 PTT3 PTT2 PTT1 PTT0
W
TIM IOC7 IOC6 IOC5 IOC4 IOC3 IOC2 IOC1 IOC0
PWM PWM4 PWM3 PWM2 PWM1 PWM0
Reset 0 0 0 00000
= Unimplemented or Reserved
Figure 2-3. Port T I/O Register (PTT)
Table 2-3. Port T[4:0] Pin Functionality Configurations
(1)
1. All fields in the that are not shaded are standard use cases.
MODRR[x] PWME[x]
TIMEN[x]
(2)
2. TIMEN[x] means that the timer is enabled (TSCR1[7]), the related channel is
configured for output compare function (TIOS[x] or special output on a timer
overflow event — configurable in TTOV[x]) and the timer output is routed to the
port pin (TCTL1/TCTL2).
Port T[x] Output
0 0 0 General Purpose I/O
0 0 1 Timer
0 1 0 General Purpose I/O
0 1 1 Timer
1 0 0 General Purpose I/O
1 0 1 Timer
1 1 0 PWM
1 1 1 PWM