Datasheet
Chapter 2 Port Integration Module (PIM9C32) Block Description
80 MC9S12C-Family / MC9S12GC-Family Freescale Semiconductor
Rev 01.24
2.3.2 Register Descriptions
Table 2-2 summarizes the effect on the various configuration bits — data direction (DDR), input/output
level (I/O), reduced drive (RDR), pull enable (PE), pull select (PS), and interrupt enable (IE) for the ports.
The configuration bit PS is used for two purposes:
1. Configure the sensitive interrupt edge (rising or falling), if interrupt is enabled.
2. Select either a pull-up or pull-down device if PE is active.
NOTE
All bits of all registers in this module are completely synchronous to internal
clocks during a register read.
Table 2-2. Pin Configuration Summary
DDR IO RDR PE PS IE
(1)
1. Applicable only on ports P and J.
Function Pull Device Interrupt
0 X X 0 X 0 Input Disabled Disabled
0 X X 1 0 0 Input Pull up Disabled
0 X X 1 1 0 Input Pull down Disabled
0 X X 0 0 1 Input Disabled Falling edge
0 X X 0 1 1 Input Disabled Rising edge
0 X X 1 0 1 Input Pull up Falling edge
0 X X 1 1 1 Input Pull down rising edge
1 0 0 X X 0 Output, full drive to 0 Disabled Disabled
1 1 0 X X 0 Output, full drive to 1 Disabled Disabled
1 0 1 X X 0 Output, reduced drive to 0 Disabled Disabled
1 1 1 X X 0 Output, reduced drive to 1 Disabled Disabled
1 0 0 X 0 1 Output, full drive to 0 Disabled Falling edge
1 1 0 X 1 1 Output, full drive to 1 Disabled Rising edge
1 0 1 X 0 1 Output, reduced drive to 0 Disabled Falling edge
1 1 1 X 1 1 Output, reduced drive to 1 Disabled Rising edge