Datasheet

Chapter 2 Port Integration Module (PIM9C32) Block Description
Freescale Semiconductor MC9S12C-Family / MC9S12GC-Family 77
Rev 01.24
2.3 Memory Map and Registers
This section provides a detailed description of all registers.
2.3.1 Module Memory Map
Figure 2-2 shows the register map of the Port Integration Module.
Port E
PE7
NOACC/
XCLKS/
GPIO
Refer to MEBI Block Guide.
PE6
IPIPE1/
MODB/
GPIO
PE5
IPIPE0/
MODA/
GPIO
PE4 ECLK/GPIO
PE3
LSTRB/
TAGLO/
GPIO
PE2
R/W/
GPIO
PE1 IRQ/GPI
PE0
XIRQ/GPI
Address Name Bit 7 654321Bit 0
0x0000 PTT
R
PTT7 PTT6 PTT5 PTT4 PTT3 PTT2 PTT1 PTT0
W
TIM IOC7 IOC6 IOC5 IOC4 IOC3 IOC2 IOC1 IOC0
PWM
PWM4 PWM3 PWM2 PWM1 PWM0
0x0001 PTIT
R PTIT7 PTIT6 PTIT5 PTIT4 PTIT3 PTIT2 PTIT1 PTIT0
W
0x0002 DDRT
R
DDRT7 DDRT6 DDRT5 DDRT4 DDRT3 DDRT2 DDRT1 DDRT0
W
0x0003 RDRT
R
RDRT7 RDRT6 RDRT5 RDRT4 RDRT3 RDRT2 RDRT1 RDRT0
W
0x0004 PERT
R
PERT7 PERT6 PERT5 PERT4 PERT3 PERT2 PERT1 PERT0
W
0x0005 PPST
R
PPST7 PPST6 PPST5 PPST4 PPST3 PPST2 PPST1 PPST0
W
= Unimplemented or Reserved
Figure 2-2. Quick Reference to PIM Registers (Sheet 1 of 3)
Table 2-1. Pin Functions and Priorities (continued)
Port Pin Name Pin Function Description
Pin Function
after Reset