Datasheet

Freescale Semiconductor MC9S12C-Family / MC9S12GC-Family 73
Rev 01.24
Chapter 2
Port Integration Module (PIM9C32) Block Description
2.1 Introduction
The Port Integration Module establishes the interface between the peripheral modules and the I/O pins for
all ports.
This chapter covers:
Port A, B, and E related to the core logic and the multiplexed bus interface
Port T connected to the TIM module (PWM module can be routed to port T as well)
Port S connected to the SCI module
Port M associated to the MSCAN and SPI module
Port P connected to the PWM module, external interrupt sources available
Port J pins can be used as external interrupt sources and standard I/O’s
The following I/O pin configurations can be selected:
Available on all I/O pins:
Input/output selection
Drive strength reduction
Enable and select of pull resistors
Available on all Port P and Port J pins:
Interrupt enable and status flags
The implementation of the Port Integration Module is device dependent.
2.1.1 Features
A standard port has the following minimum features:
Input/output selection
5-V output drive with two selectable drive strength
5-V digital and analog input
Input with selectable pull-up or pull-down device
Optional features:
Open drain for wired-OR connections
Interrupt inputs with glitch filtering