Datasheet

Chapter 21 128 Kbyte Flash Module (S12FTS128K1V1)
Freescale Semiconductor MC9S12C-Family / MC9S12GC-Family 621
Rev 01.24
21.3.2.4 Flash Configuration Register (FCNFG)
The FCNFG register enables the Flash interrupts and gates the security backdoor key writes.
CBEIE, CCIE, and KEYACC are readable and writable while remaining bits read 0 and are not writable.
KEYACC is only writable if the KEYEN bit in the FSEC register is set to the enabled state (see Section
21.3.2.2).
21.3.2.5 Flash Protection Register (FPROT)
The FPROT register defines which Flash sectors are protected against program or erase.
The FPROT register is readable in normal and special modes. FPOPEN can only be written from a 1 to a 0.
FPLS[1:0] can be written anytime until FPLDIS is cleared. FPHS[1:0] can be written anytime until
Module Base + 0x0003
76543210
R
CBEIE CCIE KEYACC
00000
W
Reset 00000000
= Unimplemented or Reserved
Figure 21-7. Flash Configuration Register (FCNFG)
Table 21-7. FCNFG Field Descriptions
Field Description
7
CBEIE
Command Buffer Empty Interrupt Enable — The CBEIE bit enables the interrupts in case of an empty
command buffer in the Flash module.
0 Command Buffer Empty interrupts disabled
1 An interrupt will be requested whenever the CBEIF flag is set (see Section 21.3.2.6)
6
CCIE
Command Complete Interrupt Enable — The CCIE bit enables the interrupts in case of all commands being
completed in the Flash module.
0 Command Complete interrupts disabled
1 An interrupt will be requested whenever the CCIF flag is set (see Section 21.3.2.6)
5
KEYACC
Enable Security Key Writing.
0 Flash writes are interpreted as the start of a command write sequence
1 Writes to the Flash array are interpreted as a backdoor key while reads of the Flash array return invalid data
Module Base + 0x0004
76543210
R
FPOPEN NV6 FPHDIS FPHS1 FPHS0 FPLDIS FPLS1 FPLS0
W
Reset F F FFFFFF
Figure 21-8. Flash Protection Register (FPROT)