Datasheet
Chapter 20 96 Kbyte Flash Module (S12FTS96KV1)
Freescale Semiconductor MC9S12C-Family / MC9S12GC-Family 577
Rev 01.24
Figure 20-2. FTS96K Block Diagram
20.2 External Signal Description
The FTS128K1FTS96K module contains no signals that connect off-chip.
20.3 Memory Map and Registers
This section describes the FTS128K1FTS96K memory map and registers.
20.3.1 Module Memory Map
The FTS128K1FTS96K memory map is shown in Figure 20-3Figure 20-4. The HCS12 architecture places
the Flash array addresses between 0x40000x4000 and 0xFFFF, which corresponds to three 16 Kbyte
pages. The content of the HCS12 Core PPAGE register is used to map the logical middle page ranging from
FTS96K
Oscillator
Clock
Command
Complete
Interrupt
Command
Buffer Empty
Interrupt
Flash Array
48K * 16 Bits
sector 0
sector 1
sector 95
Clock
Divider
FCLK
Protection
Security
Command Pipeline
cmd2
addr2
data2
cmd1
addr1
data1
Registers
Flash
Interface