Datasheet

Chapter 15 Timer Module (TIM16B8CV1) Block Description
Freescale Semiconductor MC9S12C-Family / MC9S12GC-Family 445
Rev 01.24
The 16-bit main timer is an up counter.
A full access for the counter register should take place in one clock cycle. A separate read/write for high
byte and low byte will give a different result than accessing them as a word.
Read: Anytime
Write: Has no meaning or effect in the normal mode; only writable in special modes (test_mode = 1).
The period of the first count after a write to the TCNT registers may be a different size because the write
is not synchronized with the prescaler clock.
15.3.2.6 Timer System Control Register 1 (TSCR1)
Read: Anytime
Write: Anytime
Module Base + 0x0006
76543210
R
TEN TSWAI TSFRZ TFFCA
0000
W
Reset 0 0 0 00000
= Unimplemented or Reserved
Figure 15-12. Timer System Control Register 1 (TSCR1)
Table 15-7. TSCR1 Field Descriptions
Field Description
7
TEN
Timer Enable
0 Disables the main timer, including the counter. Can be used for reducing power consumption.
1 Allows the timer to function normally.
If for any reason the timer is not active, there is no ÷64 clock for the pulse accumulator because the ÷64 is
generated by the timer prescaler.
6
TSWAI
Timer Module Stops While in Wait
0 Allows the timer module to continue running during wait.
1 Disables the timer module when the MCU is in the wait mode. Timer interrupts cannot be used to get the MCU
out of wait.
TSWAI also affects pulse accumulator.